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本帖最后由 深圳-綠皮 于 2013-11-22 10:14 編輯
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& K1 g2 r# c" K' P& P. }1 V4 D5 Y4 DDATE: 11-15-2013 HOTFIX VERSION: 0191 k7 Y: y, w0 W* y$ B0 |6 j
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" T4 [2 w3 L: f1176155 CONCEPT_HDL CORE Graphics remnants with 16.6 QIR 3" u7 a9 P7 L7 }+ l- z
1178272 CONCEPT_HDL OTHER Verilog netlist does not include split blocks correctly8 a9 ^. i7 Q" m, A& H
1190782 FSP FPGA_SUPPORT Support for Altera > 5SGXEA9N2F45 device.2 _7 R0 O+ E, J' e; n! g
1194140 ADW LRM SYNC_PROPERTIES is not resolving issues a based sync_properties settings
( m/ o9 e; y/ }1 C6 U: U1 a2 I" i% U1195744 APD EDIT_ETCH Diff_Pair routing fails on certain Uvias in the pair.# Z* O! \% j; ]3 I0 \% B
1196704 allegro_EDITOR INTERFACES ENH: During ipc2581 export checkboxes corresponding to 縈iscellaneous Image Layers� should automatically get selected2 Z9 F0 X% Q" E
1198340 ALLEGRO_EDITOR OTHER Multiple -product option on the Allegro command line does not access the second -product' C0 t7 U) \- d6 Y' a' C
1198596 ALLEGRO_EDITOR INTERFACES When copper thickness is increased for the outer layers, step Viewer does not show correct component position.6 f2 p" R: A8 B: g
1199673 PCB_LIBRARIAN OTHER Component Browser fails to load footrpints if they are set with UNC path" a3 G# q: o% i3 r* V
1199889 ALLEGRO_EDITOR DATABASE Allegro crashing with latest hotfix." h" b- S5 M. \/ `2 T5 Y
1200303 ALLEGRO_EDITOR GRAPHICS 3D Viewer does not update after changing STEP model mapping
1 s# ?+ V, y9 ?! }1200449 ALLEGRO_EDITOR REPORTS Allegro crashes when generating Net Loop Report.
$ [" ]8 f `# ^: l1 g8 x U1200915 ALLEGRO_EDITOR DATABASE Reducing accuracy of this specific design crashes Allegro: U! ~0 G H" Y- o# W4 m# L
1201011 ADW COMPONENT_BROWSE Component Browser crashes in DB mode
6 I* i3 m% H+ a; k1201376 ALLEGRO_EDITOR INTERFACES Allegro hangs when trying to map a specific STEP model to a package drawing.
, T" e/ P6 U# z. I9 c" [, B* W3 w6 K1201897 SIP_layout IMPORT_DATA BGA Pin Colors not matching the Colors defined in the Symbol Spreadsheet after updating.9 o: M: R: G" d$ B6 c+ x
1202709 ALLEGRO_EDITOR INTERFACES STEP File generated from Allegro is not overwritten when the variable "set ads_textrevs A$ {' P! c" t# h
1202820 ALLEGRO_EDITOR INTERFACES Different xml generation for same step model on S106 and S017$ H$ i, S7 y7 J$ j
1202842 ALLEGRO_EDITOR INTERFACES Step model invisible for one pin dra in allegro 16.6 symbol editor
2 O! X, W% z& W a1202983 ALLEGRO_EDITOR SHAPE Shape voiding creates DRC with Route Keepout
* W+ E3 B- A: z1203125 ALLEGRO_EDITOR OTHER Exporting STEP file with External copper enabled does not show all copper when viewed with Solid Edge or Inventor9 V* ?& Y8 {7 e9 B: b" T
1203236 ALLEGRO_EDITOR INTERFACES IPC2581 output with crosshatched shape is not correct
! g) g$ D. F) E2 ~7 O) k1203995 CONCEPT_HDL CHECKPLUS CheckPlus rule, local_signal_no_offpage_body, getting an incorrect failure.9 G" q8 L, v1 k" a& S
1204629 ALLEGRO_EDITOR SKILL axlUIDataBrowse crashes the editor or returns error2 D! |" S5 O& N4 h# j' F4 w8 g
1204640 SIP_LAYOUT DIE_EDITOR Concurrent co-design update fails
6 _/ v& f# y8 {, T+ m1204881 SIP_LAYOUT BGA_GENERATOR Pin numbers are messed up after deleting a pin at a staggered bga V& _# l. h, R1 b2 d7 _: }& g
1204885 CONCEPT_HDL CONSTRAINT_MGR Cant assign discrete models after the wrong model was removed.- v9 \1 u7 p6 w5 F
1205374 ALLEGRO_EDITOR OTHER pdf out command creates incorrect drill Symbol Characters placement in pdf file when setting film mirrored.8 O4 y) a3 h) R2 g. F7 D0 g/ f
1205729 SIP_LAYOUT DIE_EDITOR update of codesign db fails on exit from die editor
% Q$ z0 }1 t$ K/ t, Y1205801 ALLEGRO_EDITOR OTHER Tool crash when do export IPF., O# E4 K$ p; d. e0 E9 v" ^ g& G
1205881 CONSTRAINT_MGR OTHER In CMGR , Objects > Create crashes Allegro
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